The present invention generally relates to an image display apparatus, and particularly to an image display apparatus capable of displaying image information signals of a plurality of different types in personal computers and of television signals.
Recently, so-called multimedia type image display apparatuses have been widely getting attention which can display on the same screen image information signals of different types such as output signals with much letter information from personal computers (hereinafter, abbreviated "PC") and television signals with chiefly images. In addition, as disclosed in, for example, JP-A-6-276462, these image display apparatuses have often used displays of the flat panel type having fixed pixels in which liquid crystals or plasma are used.
These image display apparatuses often have a plurality of input terminals, for example, input terminals for the output signals from PC, and input terminals for ED (Extended Definition) TV signals. One of the image types of these input terminals is selected by a signal change-over circuit in response to the order or command from the user. The input image signal produced from this signal change-over circuit is identified in its type (PC signal or TV signal) by an input signal discrimination circuit. The input image signal of the type identified as above is converted in its pixels by a pixel conversion circuit to be suited for the number of pixels of the display screen in accordance with the result from the signal discrimination circuit. The pixel information is displayed on the display screen. The above input signal discrimination circuit discriminates the type of the input image signal on the input image signal on the basis of the horizontal synchronizing frequency and vertical synchronizing frequency fed in superposition on or separately from the input image signal. In addition, the pixel conversion circuit sets a conversion coefficient (magnification or reduction rate) according to the discrimination result from the input signal discrimination circuit, and carries out pixel conversion process for the input image signal by use of the conversion coefficient.
When a signal of 640.times.480 pixels (horizontal synchronizing frequency of about 31.5 kHz, vertical synchronizing frequency of about 60 Hz) corresponding to, for example, VGA mode is applied to the PC signal input terminal of the image display apparatus which has (1024.times.768) pixels corresponding to XGA mode, the input signal discrimination circuit recognizes the input image signal as a PC signal corresponding to VGA from the horizontal and vertical synchronizing frequencies. The pixel conversion circuit sets the horizontal and vertical conversion coefficients (magnifying coefficients) to be 1.5 times, respectively. Then, the input image signal is magnified, or expanded in the horizontal and vertical directions by 1.5 times by use of the conversion coefficients, thus converting the input signal into a signal of 960.times.720 pixels.
Thus, when the input image signal is magnified, or expanded, new pixels for interpolation are required to be created and inserted into the input image signal. As this system for producing and inserting the interpolating pixels, the following system is chiefly known. In the following system it is assumed, for example, that pixels are converted from 2 dots to 3 dots (1.5 times magnification). FIGS. 3A and 3B briefly show the idea.
(a) As a first system, a pixel having the same image information (luminance, chromaticity and so on) as a certain pixel is used for the interpolation to be inserted adjacent to the certain pixel (see FIG. 3A). PA1 (b) As a second system, the image information of two adjacent pixels are averaged into a pixel for the interpolation to be inserted between the two adjacent pixels (see FIG. 3B).